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Virtual Memory, Paging, Working Set & Thrashing

Virtual memory keeps only part of a process resident and pages the rest on demand; the MMU translates and protects every access in hardware, multi-level segmentation+paging slices the logical address into countable table fields, and the working-set / page-fault-frequency models keep total frame demand under capacity to avoid thrashing.

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Demand paging and locality

Virtual memory lets a process run with only part of its address space resident in physical frames; a missing page is fetched on demand when referenced, triggering a page fault. This works only because real programs obey the principle of locality — over any short interval they touch a small, slowly drifting cluster of pages (a loop body, the top of the stack, the current data block).

Address translation, the MMU & the TLB

Every address the CPU emits is a virtual (logical) address; it is translated to a physical address on every memory reference by the Memory Management Unit (MMU) — a dedicated hardware block inside the processor chip, not software and not part of RAM. The MMU does two things at once:

  1. Translate — split the virtual address into a page number pp and a page offset dd; use pp to index the page table, read the physical frame number ff, and form the physical address by concatenating ff with the unchanged offset dd.
  2. Protect — check the access lies in a page the process owns and matches its permission bits (read / write / execute, user / kernel); a violation raises a hardware trap (page / protection fault) to the OS.

Because both run in hardware on each access, isolation between address spaces is enforced at full speed. The OS only configures the MMU (builds the page tables, reloads the page-table base register on a context switch); it never performs the per-access check itself. The TLB (translation look-aside buffer) caches recent p→fp\to f mappings so most references skip the page-table walk.

For a vv-bit virtual address and a page of 2d2^{d} bytes, the offset is dd bits and the page-number field is v−dv-d bits, so a flat page table has up to 2 v−d2^{\,v-d} entries.

Multilevel paging & segmentation

A flat page table for a large address space is enormous, so systems either use multi-level page tables (the page-number field is itself sliced into indices into a hierarchy of tables) or combine segmentation with paging. In the two-level segmentation+paging scheme the logical address carries three fields:

address=[ segment  ∣  page number  ∣  offset ].\text{address}=[\,\text{segment}\;|\;\text{page number}\;|\;\text{offset}\,].

To count translation-table rows, split the address by field width:

  • an ss-bit segment field ⇒\Rightarrow the segment table holds up to 2s2^{s} rows;
  • a pp-bit page field ⇒\Rightarrow each segment's page table holds up to 2p2^{p} rows;
  • total =2s⏟segment table+2s×2p⏟one page table per segment=\underbrace{2^{s}}_{\text{segment table}}+\underbrace{2^{s}\times 2^{p}}_{\text{one page table per segment}}.

When the process has “at most kk segments” and kk is not a power of two, the field still needs ⌈log⁡2k⌉\lceil\log_2 k\rceil bits, so the table can address up to 2⌈log⁡2k⌉2^{\lceil\log_2 k\rceil} segments (the maximum an exam asks for).

Mini-example (row counting)

16-bit address, at most 6 sections, 4 bits to address a page. Segment field =⌈log⁡26⌉=3=\lceil\log_2 6\rceil=3 bits ⇒\Rightarrow up to 23=82^{3}=8 segments, so the segment table has 88 rows. Each page table has 24=162^{4}=16 rows. (The remaining 16−3−4=916-3-4=9 bits are the offset — page size 29=5122^{9}=512.) Maximum total rows:

8+8×16=8+128=136.8+8\times 16 = 8+128 = 136.

Counting only the page tables (forgetting the segment table) gives the classic wrong answer 128128; rounding 6 down to a 2-bit field gives 4+64=684+64=68.

The working set

Locality is captured by the working set. Fix a window size Δ\Delta (a number of recent references). At time tt:

WS(t,Δ)={distinct pages referenced in (t−Δ,  t]}.WS(t,\Delta)=\{\text{distinct pages referenced in } (t-\Delta,\; t]\}.

Its size WSSi=∣WS(t,Δ)∣WSS_i=|WS(t,\Delta)| is the working-set size of process ii — an estimate of how many frames it needs right now. The OS sums them, D=∑iWSSiD=\sum_i WSS_i, and the working-set policy keeps a process resident only while it can be granted its full WSSiWSS_i; if D>mD>m (total physical frames) it suspends/swaps a process out to drive DD below mm.

  • Stable phase — inside a tight loop or a recursion that re-executes the same code/stack pages, no new page enters the window, so the working set can stay unchanged.
  • Phase transition — when control moves to a new region, the working set jumps as fresh pages appear and stale ones age out of the window.

Thrashing

Thrashing is the pathological state where the system spends more time servicing page faults than doing useful work. It arises when the degree of multiprogramming is pushed too high: each resident process gets fewer frames than its working set demands, so it faults almost every reference, the paging disk saturates, CPU utilization collapses, and a mis-tuned scheduler reacts by admitting more processes — a positive-feedback spiral.

Symptom What you observe
CPU utilization very low (CPU idles waiting for pages)
Paging-disk utilization near 100%
Throughput collapses despite high multiprogramming

Note the symptom is necessary-looking, not sufficient: a busy paging disk with idle CPU suggests thrashing, but the same picture is produced by an ordinary I/O-bound job (a large file copy or sequential scan). High disk use alone never proves thrashing.

Controlling it: page-fault frequency (PFF)

Instead of measuring WSSWSS directly, watch each process's page-fault rate and keep it inside a target band [L,U][L,U]:

  • rate above UU ⇒\Rightarrow too few frames ⇒\Rightarrow give it more;
  • rate below LL ⇒\Rightarrow spare frames ⇒\Rightarrow take some away;
  • if no free frame exists when a process is over UU, suspend a process to free frames.

Belady's anomaly and stack algorithms

Intuitively, more frames should never increase faults — but with FIFO replacement, giving more frames can produce more faults. This is Belady's anomaly. It is avoided exactly by stack algorithms, whose resident set with mm frames is always a subset of the set with m+1m+1 frames:

pages(m)⊆pages(m+1).\text{pages}(m)\subseteq \text{pages}(m+1).

LRU and OPT (MIN) are stack algorithms and are immune; FIFO is not, and LFU is generally not a stack algorithm either, so LFU is not guaranteed immune to Belady's anomaly.

Mini-example (working set)

Reference string with window Δ=4\Delta=4 (last 4 references):

ref:  c  c  c  d  d  c  c  d   (a recursive call reusing pages c, d)
WS:  {c}{c}{c}{c,d}{c,d}{c,d}{c,d}{c,d}

After the first transient the working set settles to {c,d}\{c,d\} and stays constant while the recursion keeps re-touching the same two pages — so the routine needs only 2 frames and never thrashes, however deep the recursion (as long as the active stack region fits the window).

Exam trick: Two traps recur here. (1) On address-translation counting, split the logical address into its fields and remember both levels — the total is 2s+2s⋅2p2^{s}+2^{s}\cdot 2^{p}, so add the segment table (or the outer table), never just the page tables; and the MMU that walks them is hardware inside the CPU, not software and not in RAM. (2) On ‘which statement is correct?’ items, distrust absolutes — definitely thrashing, immune from Belady's — and favour the soft can/may: ‘the working set can stay unchanged during recursion’ is true, while ‘idle CPU + busy disk definitely means thrashing’ and ‘LFU is immune to Belady's anomaly’ are both overstated and false.

فرمول‌های کلیدی

Paged address split & page-table size
addr=[ p∣d ],entries=2 v−d\text{addr}=[\,p \mid d\,],\qquad \text{entries}=2^{\,v-d}

A v-bit virtual address with 2^d-byte pages has a d-bit offset and a (v-d)-bit page number; a flat page table has up to 2^{v-d} entries.

Two-level (segmentation+paging) table rows
2s+2s⋅2p2^{s}+2^{s}\cdot 2^{p}

s-bit segment field, p-bit page field: segment-table rows (2^s) plus one 2^p-row page table per segment. E.g. 6 sections → 3-bit field, 4-bit page: 8 + 8×16 = 136.

Working set
WS(t,Δ)={distinct pages referenced in (t−Δ, t]}WS(t,\Delta)=\{\text{distinct pages referenced in } (t-\Delta,\, t]\}

Set of pages touched in the last \Delta references; its size WSS estimates the frames the process needs now.

Thrashing condition (total demand)
D=∑iWSSi>mD=\sum_i WSS_i > m

When the summed working-set demand exceeds the m physical frames, the system thrashes; the OS lowers multiprogramming until D \le m.

Stack-algorithm (Belady-immune) property
pages(m)⊆pages(m+1)\text{pages}(m)\subseteq \text{pages}(m+1)

Resident set with m frames is a subset of that with m+1 frames (holds for LRU, OPT); guarantees more frames never cause more faults.

#virtual-memory#paging#address-translation#mmu#memory-protection#segmentation#page-table-size#multilevel-paging#tlb#demand-paging#working-set#thrashing#page-replacement#beladys-anomaly#page-fault-frequency#locality#degree-of-multiprogramming

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