سوال ۸۳ کنکور ارشد مهندسی کامپیوتر ۱۴۰۰

A 4-to-1 multiplexer has four data inputs $I_0,I_1,I_2,I_3$ and two select lines $S_1,S_0$. Its standard sum-of-products (AND-OR) realization is

$Y = I_0\,\bar{S_1}\,\bar{S_0} + I_1\,\bar{S_1}\,S_0 + I_2\,S_1\,\bar{S_0} + I_3\,S_1\,S_0.$

Cost it by total gate inputs (cost of a gate = number of its inputs):

Total $= 2 + 12 + 4 = 18$.

Each AND gate must receive the data bit plus the two decoded select conditions, so it needs $3$ inputs; the two select inverters are shared across all four product terms, so only $2$ inverters are required (not $8$). The final OR must merge all $4$ product terms, costing $4$. This AND-OR-INVERT structure is minimal for a standard two-level MUX, giving a cost of $18$ — option 3.

Pitfall: Don't forget the $2$ shared inverters for the select lines, and remember each product AND gate is $3$-input (data + 2 select), not $2$-input. Counting $4\times2 + 4 = 12$ underestimates and lands on the trap value $14$.